Panda3D
|
Public Attributes | |
union { | |
struct { | |
char cpu_vendor [16] | |
int maximum_cpu_id_input | |
} | |
CPU_ID_REGISTERS cpu_id_registers_0 | |
}; | |
union { | |
struct { | |
union { | |
struct { | |
unsigned int extended_family_id: 8 | |
unsigned int extended_model_id: 4 | |
unsigned int family: 4 | |
unsigned int model: 4 | |
unsigned int processor_type: 2 | |
unsigned int reserved_0: 2 | |
unsigned int reserved_1: 4 | |
unsigned int stepping_id: 4 | |
} | |
unsigned int eax | |
unsigned int version_information | |
} | |
union { | |
struct { | |
unsigned int brand_index: 8 | |
unsigned int clflush: 8 | |
unsigned int initial_apic_id: 8 | |
unsigned int maximum_logical_processors: 8 | |
} | |
unsigned int ebx | |
} | |
union { | |
struct { | |
unsigned int cmpxchg16b: 1 | |
unsigned int cnxt_id: 1 | |
unsigned int ds_cpl: 1 | |
unsigned int est: 1 | |
unsigned int monitor: 1 | |
unsigned int reserved_11_to_12: 2 | |
unsigned int reserved_15_to_31: 17 | |
unsigned int reserved_1_to_2: 2 | |
unsigned int reserved_6: 1 | |
unsigned int reserved_9: 1 | |
unsigned int sse3: 1 | |
unsigned int tm2: 1 | |
unsigned int vmx: 1 | |
unsigned int xtpr_disable: 1 | |
} | |
unsigned int ecx | |
} | |
union { | |
struct { | |
unsigned int acpi: 1 | |
unsigned int apic: 1 | |
unsigned int cflush: 1 | |
unsigned int cmov: 1 | |
unsigned int cx8: 1 | |
unsigned int de: 1 | |
unsigned int ds: 1 | |
unsigned int fpu: 1 | |
unsigned int fxsr: 1 | |
unsigned int htt: 1 | |
unsigned int mca: 1 | |
unsigned int mce: 1 | |
unsigned int mmx: 1 | |
unsigned int msr: 1 | |
unsigned int mtrr: 1 | |
unsigned int pae: 1 | |
unsigned int pat: 1 | |
unsigned int pbe: 1 | |
unsigned int pge: 1 | |
unsigned int pse: 1 | |
unsigned int pse_36: 1 | |
unsigned int psn: 1 | |
unsigned int reserved_10: 1 | |
unsigned int reserved_20: 1 | |
unsigned int reserved_30: 1 | |
unsigned int sep: 1 | |
unsigned int ss: 1 | |
unsigned int sse: 1 | |
unsigned int sse2: 1 | |
unsigned int tm: 1 | |
unsigned int tsc: 1 | |
unsigned int vme: 1 | |
} | |
unsigned int edx | |
} | |
} | |
CPU_ID_REGISTERS cpu_id_registers_1 | |
}; | |
union { | |
unsigned char character_array_2 [(8 *sizeof(CPU_ID_REGISTERS))] | |
CPU_ID_REGISTERS cpu_id_registers_2 | |
CPU_ID_REGISTERS cpu_id_registers_2_array [8] | |
}; | |
union { | |
CPU_ID_REGISTERS cpu_id_registers_0x80000000 | |
}; | |
union { | |
CPU_ID_REGISTERS cpu_id_registers_0x80000001 | |
}; | |
union { | |
struct { | |
CPU_ID_REGISTERS cpu_id_registers_0x80000002 | |
CPU_ID_REGISTERS cpu_id_registers_0x80000003 | |
CPU_ID_REGISTERS cpu_id_registers_0x80000004 | |
} | |
char cpu_brand_string [sizeof(CPU_ID_REGISTERS)*3] | |
}; | |
union { | |
struct { | |
union { | |
unsigned int eax | |
} | |
union { | |
unsigned int ebx | |
} | |
union { | |
struct { | |
unsigned int l1_data_associativity: 8 | |
unsigned int l1_data_cache_line_size: 8 | |
unsigned int l1_data_cache_size: 8 | |
unsigned int l1_data_reserved_8_to_15: 8 | |
} | |
unsigned int ecx | |
} | |
union { | |
struct { | |
unsigned int l1_code_associativity: 8 | |
unsigned int l1_code_cache_line_size: 8 | |
unsigned int l1_code_cache_size: 8 | |
unsigned int l1_code_reserved_8_to_15: 8 | |
} | |
unsigned int edx | |
} | |
} | |
CPU_ID_REGISTERS cpu_id_registers_0x80000005 | |
}; | |
union { | |
struct { | |
union { | |
unsigned int eax | |
} | |
union { | |
unsigned int ebx | |
} | |
union { | |
struct { | |
unsigned int l2_associativity: 4 | |
unsigned int l2_cache_line_size: 8 | |
unsigned int l2_cache_size: 16 | |
unsigned int l2_reserved_8_to_11: 4 | |
} | |
unsigned int ecx | |
} | |
union { | |
unsigned int edx | |
} | |
} | |
CPU_ID_REGISTERS cpu_id_registers_0x80000006 | |
}; | |
union { | |
struct { | |
union { | |
unsigned int ecx | |
} | |
union { | |
unsigned int edx | |
} | |
union { | |
unsigned int eax | |
} | |
union { | |
unsigned int ebx | |
} | |
} | |
CPU_ID_REGISTERS cpu_id_registers_0x80000008 | |
}; | |
unsigned int | cache_line_size |
unsigned int | log_base_2_cache_line_size |
Definition at line 169 of file winGraphicsPipe.cxx.